
  <rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom">
    <channel>
      <title>dsheng.chen Blog</title>
      <link>https://sexjun-github-io.vercel.app//blog</link>
      <description>A blog about software engineering, programming, and web development.</description>
      <language>zh-CN,</language>
      <managingEditor>address@yoursite.com (dsheng.chen)</managingEditor>
      <webMaster>address@yoursite.com (dsheng.chen)</webMaster>
      <lastBuildDate>Wed, 08 Jul 2026 00:00:00 GMT</lastBuildDate>
      <atom:link href="https://sexjun-github-io.vercel.app//tags/编译器/feed.xml" rel="self" type="application/rss+xml"/>
      
  <item>
    <guid>https://sexjun-github-io.vercel.app//blog/Encoding_Dialect_详解</guid>
    <title>Encoding Dialect 详解</title>
    <link>https://sexjun-github-io.vercel.app//blog/Encoding_Dialect_详解</link>
    <description>**Dialect 名称**: `iree_encoding` **C++ 命名空间**: `::mlir::iree_compiler::IREE::Encoding` **主要用途**: 张量编码属性和相关操作（数据分块/布局优化） --- 1. [概述](#1-概述) 2....</description>
    <pubDate>Wed, 08 Jul 2026 00:00:00 GMT</pubDate>
    <author>address@yoursite.com (dsheng.chen)</author>
    <category>IREE</category><category>编译器</category><category>MLIR</category><category>Pass</category><category>Dialect</category><category>编译原理</category><category>编译器后端</category><category>编译优化</category><category>CPU</category><category>GPU</category><category>Vulkan</category>
  </item>

  <item>
    <guid>https://sexjun-github-io.vercel.app//blog/Flow_Dialect_详解</guid>
    <title>Flow Dialect 详解</title>
    <link>https://sexjun-github-io.vercel.app//blog/Flow_Dialect_详解</link>
    <description>**Dialect 名称**: `flow` **C++ 命名空间**: `::mlir::iree_compiler::IREE::Flow` **主要用途**: 建模执行数据流和分区（dispatch region） --- 1. [概述](#1-概述) 2. [文件结构](#2-文件结构)...</description>
    <pubDate>Wed, 08 Jul 2026 00:00:00 GMT</pubDate>
    <author>address@yoursite.com (dsheng.chen)</author>
    <category>IREE</category><category>编译器</category><category>MLIR</category><category>Pass</category><category>Dialect</category><category>编译原理</category><category>编译器后端</category><category>编译优化</category><category>LLVM</category><category>CPU</category><category>GPU</category><category>Vulkan</category>
  </item>

  <item>
    <guid>https://sexjun-github-io.vercel.app//blog/HAL_Dialect_详解</guid>
    <title>HAL Dialect 详解</title>
    <link>https://sexjun-github-io.vercel.app//blog/HAL_Dialect_详解</link>
    <description>**Dialect 名称**: `hal` **C++ 命名空间**: `::mlir::iree_compiler::IREE::HAL` **主要用途**: 硬件抽象层（Vulkan-like，无图形部分） --- 1. [概述](#1-概述) 2. [文件结构](#2-文件结构) 3....</description>
    <pubDate>Wed, 08 Jul 2026 00:00:00 GMT</pubDate>
    <author>address@yoursite.com (dsheng.chen)</author>
    <category>IREE</category><category>编译器</category><category>MLIR</category><category>Pass</category><category>Dialect</category><category>编译原理</category><category>编译器后端</category><category>编译优化</category><category>LLVM</category><category>CPU</category><category>GPU</category><category>CUDA</category><category>Vulkan</category>
  </item>

  <item>
    <guid>https://sexjun-github-io.vercel.app//blog/IREE_Pass_与_Dialect_完整指南</guid>
    <title>IREE Pass 与 Dialect 完整指南</title>
    <link>https://sexjun-github-io.vercel.app//blog/IREE_Pass_与_Dialect_完整指南</link>
    <description>本文档记录了 IREE 编译器中所有自定义的 Dialect 和 Pass，包括它们的作用、作用对象以及在编译 Pipeline 中的顺序。 --- 1. [IREE 自有 Dialect 列表](#1-iree-自有-dialect-列表) 2. [Pass 总览](#2-pass-总览) 3....</description>
    <pubDate>Wed, 08 Jul 2026 00:00:00 GMT</pubDate>
    <author>address@yoursite.com (dsheng.chen)</author>
    <category>IREE</category><category>编译器</category><category>MLIR</category><category>Pass</category><category>Dialect</category><category>编译原理</category><category>编译器后端</category><category>调试</category><category>编译优化</category><category>LLVM</category><category>CPU</category><category>GPU</category><category>Vulkan</category>
  </item>

  <item>
    <guid>https://sexjun-github-io.vercel.app//blog/LinalgExt_Dialect_详解</guid>
    <title>LinalgExt Dialect 详解</title>
    <link>https://sexjun-github-io.vercel.app//blog/LinalgExt_Dialect_详解</link>
    <description>**Dialect 名称**: `iree_linalg_ext` **C++ 命名空间**: `::mlir::iree_compiler::IREE::LinalgExt` **主要用途**: Linalg 非结构化/实验性扩展 --- 1. [概述](#1-概述) 2....</description>
    <pubDate>Wed, 08 Jul 2026 00:00:00 GMT</pubDate>
    <author>address@yoursite.com (dsheng.chen)</author>
    <category>IREE</category><category>编译器</category><category>MLIR</category><category>Pass</category><category>Dialect</category><category>编译原理</category><category>编译器后端</category><category>编译优化</category><category>GPU</category>
  </item>

  <item>
    <guid>https://sexjun-github-io.vercel.app//blog/Stream_Dialect_详解</guid>
    <title>Stream Dialect 详解</title>
    <link>https://sexjun-github-io.vercel.app//blog/Stream_Dialect_详解</link>
    <description>**Dialect 名称**: `stream` **C++ 命名空间**: `::mlir::iree_compiler::IREE::Stream` **主要用途**: 建模执行分区和异步调度 --- 1. [概述](#1-概述) 2. [文件结构](#2-文件结构) 3....</description>
    <pubDate>Wed, 08 Jul 2026 00:00:00 GMT</pubDate>
    <author>address@yoursite.com (dsheng.chen)</author>
    <category>IREE</category><category>编译器</category><category>MLIR</category><category>Pass</category><category>Dialect</category><category>编译原理</category><category>编译器后端</category><category>编译优化</category>
  </item>

  <item>
    <guid>https://sexjun-github-io.vercel.app//blog/TensorExt_Dialect_详解</guid>
    <title>TensorExt Dialect 详解</title>
    <link>https://sexjun-github-io.vercel.app//blog/TensorExt_Dialect_详解</link>
    <description>**Dialect 名称**: `iree_tensor_ext` **C++ 命名空间**: `::mlir::iree_compiler::IREE::TensorExt` **主要用途**: Tensor 方言实验性扩展（超出标准 Tensor Dialect 的张量操作） --- 1....</description>
    <pubDate>Wed, 08 Jul 2026 00:00:00 GMT</pubDate>
    <author>address@yoursite.com (dsheng.chen)</author>
    <category>IREE</category><category>编译器</category><category>MLIR</category><category>Dialect</category><category>编译原理</category>
  </item>

  <item>
    <guid>https://sexjun-github-io.vercel.app//blog/Util_Dialect_详解</guid>
    <title>Util Dialect 详解</title>
    <link>https://sexjun-github-io.vercel.app//blog/Util_Dialect_详解</link>
    <description>**Dialect 名称**: `util` **C++ 命名空间**: `::mlir::iree_compiler::IREE::Util` **主要用途**: IREE 各子 Dialect 共享的通用类型和工具 Op --- 1. [概述](#1-概述) 2....</description>
    <pubDate>Wed, 08 Jul 2026 00:00:00 GMT</pubDate>
    <author>address@yoursite.com (dsheng.chen)</author>
    <category>IREE</category><category>编译器</category><category>MLIR</category><category>Pass</category><category>Dialect</category><category>编译原理</category><category>调试</category><category>编译优化</category>
  </item>

  <item>
    <guid>https://sexjun-github-io.vercel.app//blog/VMVX_Dialect_详解</guid>
    <title>VMVX Dialect 详解</title>
    <link>https://sexjun-github-io.vercel.app//blog/VMVX_Dialect_详解</link>
    <description>**Dialect 名称**: `vmvx` **C++ 命名空间**: `::mlir::iree_compiler::IREE::VMVX` **主要用途**: IREE VM 的向量扩展（Virtual Machine-based Linear Algebra eXtensions） ---...</description>
    <pubDate>Wed, 08 Jul 2026 00:00:00 GMT</pubDate>
    <author>address@yoursite.com (dsheng.chen)</author>
    <category>IREE</category><category>编译器</category><category>MLIR</category><category>Pass</category><category>Dialect</category><category>编译原理</category><category>编译器后端</category><category>编译优化</category><category>LLVM</category><category>CPU</category><category>GPU</category>
  </item>

  <item>
    <guid>https://sexjun-github-io.vercel.app//blog/VM_Dialect_详解</guid>
    <title>VM Dialect 详解</title>
    <link>https://sexjun-github-io.vercel.app//blog/VM_Dialect_详解</link>
    <description>**Dialect 名称**: `vm` **C++ 命名空间**: `::mlir::iree_compiler::IREE::VM` **主要用途**: 抽象虚拟机操作，可以序列化为字节码或降低为静态表示 --- 1. [概述](#1-概述) 2. [文件结构](#2-文件结构) 3....</description>
    <pubDate>Wed, 08 Jul 2026 00:00:00 GMT</pubDate>
    <author>address@yoursite.com (dsheng.chen)</author>
    <category>IREE</category><category>编译器</category><category>MLIR</category><category>Pass</category><category>Dialect</category><category>编译原理</category><category>编译优化</category><category>LLVM</category><category>GPU</category><category>Vulkan</category>
  </item>

  <item>
    <guid>https://sexjun-github-io.vercel.app//blog/iree-opt-passes-categorized</guid>
    <title>iree-opt 功能分类</title>
    <link>https://sexjun-github-io.vercel.app//blog/iree-opt-passes-categorized</link>
    <description>&gt; 基于 `iree-opt --help` 输出整理，约 400+ 个 pass 和 50+ 个 pass pipeline。 --- 例如运行 `cse`（公共子表达式消除）： 用 `--pass-pipeline` 指定完整的 pipeline，pass 之间用空格分隔： 某些 pass...</description>
    <pubDate>Sun, 10 May 2026 00:00:00 GMT</pubDate>
    <author>address@yoursite.com (dsheng.chen)</author>
    <category>IREE</category><category>编译器</category><category>MLIR</category><category>ONNX</category><category>Pass</category><category>Dialect</category><category>编译原理</category><category>编译器前端</category><category>编译器后端</category><category>调试</category><category>编译优化</category><category>LLVM</category><category>CPU</category><category>GPU</category>
  </item>

  <item>
    <guid>https://sexjun-github-io.vercel.app//blog/iree_compiler_core_principles</guid>
    <title>IREE 编译器核心原理</title>
    <link>https://sexjun-github-io.vercel.app//blog/iree_compiler_core_principles</link>
    <description>1. [指令执行顺序如何确定](#1-指令执行顺序如何确定) 2. [Stream 编译器深入解析](#2-stream-编译器深入解析) 3. [完整编译流程](#3-完整编译流程) 4. [SSA 值在 Stream 中的转换](#4-ssa-值在-stream-中的转换) --- IREE...</description>
    <pubDate>Tue, 07 Jul 2026 00:00:00 GMT</pubDate>
    <author>address@yoursite.com (dsheng.chen)</author>
    <category>IREE</category><category>编译器</category><category>MLIR</category><category>Pass</category><category>Dialect</category><category>编译原理</category><category>编译器前端</category><category>编译器后端</category><category>编译优化</category><category>LLVM</category><category>CPU</category><category>GPU</category><category>CUDA</category><category>Vulkan</category>
  </item>

  <item>
    <guid>https://sexjun-github-io.vercel.app//blog/iree_debug</guid>
    <title>IREE 调试技巧指南</title>
    <link>https://sexjun-github-io.vercel.app//blog/iree_debug</link>
    <description>本文档汇总 IREE 模型编译和运行过程中常用的调试技巧。 --- 输出每个编译 Pass 的耗时，定位性能瓶颈。 生成 `dump/` 目录，包含各编译阶段的 IR 快照，方便对比差异。 编译为debug模式,并且iree-compiler 添加 debug 的参数,则可以打印出来日志,...</description>
    <pubDate>Tue, 07 Jul 2026 00:00:00 GMT</pubDate>
    <author>address@yoursite.com (dsheng.chen)</author>
    <category>IREE</category><category>编译器</category><category>MLIR</category><category>ONNX</category><category>Pass</category><category>编译原理</category><category>调试</category><category>LLVM</category><category>CPU</category><category>GPU</category><category>Vulkan</category><category>性能优化</category>
  </item>

  <item>
    <guid>https://sexjun-github-io.vercel.app//blog/onnx_to_iree_pipeline</guid>
    <title>IREE ONNX 模型端到端流程</title>
    <link>https://sexjun-github-io.vercel.app//blog/onnx_to_iree_pipeline</link>
    <description>本文档记录从下载 ONNX 模型，到固化 Shape，再到转换为 MLIR IR，编译为 VMFB，最后执行推理的完整流程。 **编译工具**: 全部使用本地编译的 IREE，不依赖外部安装包。 安装本地 Runtime 绑定： ONNX 模型的输入通常使用动态 batch size（用 `N`...</description>
    <pubDate>Tue, 07 Jul 2026 00:00:00 GMT</pubDate>
    <author>address@yoursite.com (dsheng.chen)</author>
    <category>IREE</category><category>编译器</category><category>MLIR</category><category>ONNX</category><category>编译原理</category><category>编译器后端</category><category>编译优化</category><category>LLVM</category><category>CPU</category><category>CUDA</category><category>Vulkan</category>
  </item>

  <item>
    <guid>https://sexjun-github-io.vercel.app//blog/前端</guid>
    <title>ONNX 前端</title>
    <link>https://sexjun-github-io.vercel.app//blog/前端</link>
    <description>compiler/bindings/python/iree/compiler/tools/import_onnx/ ├── __main__.py                              # CLI 入口 (9.7KB) ├──...</description>
    <pubDate>Wed, 08 Jul 2026 00:00:00 GMT</pubDate>
    <author>address@yoursite.com (dsheng.chen)</author>
    <category>IREE</category><category>编译器</category><category>MLIR</category><category>ONNX</category><category>Dialect</category><category>编译器前端</category>
  </item>

  <item>
    <guid>https://sexjun-github-io.vercel.app//blog/编译器的codegen架构</guid>
    <title>编译器的 codegen 架构</title>
    <link>https://sexjun-github-io.vercel.app//blog/编译器的codegen架构</link>
    <description>编译器 codegen 架构的几种方案对比及工程实践注意事项。</description>
    <pubDate>Sun, 26 Apr 2026 00:00:00 GMT</pubDate>
    <author>address@yoursite.com (dsheng.chen)</author>
    <category>编译器</category><category>CodeGen</category>
  </item>

  <item>
    <guid>https://sexjun-github-io.vercel.app//blog/编译流程</guid>
    <title>Simple Conv — 单层卷积 IREE 编译产物</title>
    <link>https://sexjun-github-io.vercel.app//blog/编译流程</link>
    <description>从 ResNet50 模型中提取第一个卷积层 `resnetv17_conv0_fwd`，固化 batch size 为 1，并通过 IREE 编译为可执行格式。 源模型：`../resnet50-v1-12_resnetv17_conv0_fwd-bs1.onnx`（batch=1...</description>
    <pubDate>Tue, 07 Jul 2026 00:00:00 GMT</pubDate>
    <author>address@yoursite.com (dsheng.chen)</author>
    <category>IREE</category><category>编译器</category><category>MLIR</category><category>ONNX</category><category>编译原理</category><category>LLVM</category><category>CPU</category>
  </item>

  <item>
    <guid>https://sexjun-github-io.vercel.app//blog/编译结果</guid>
    <title>IREE 编译命令逐项拆解</title>
    <link>https://sexjun-github-io.vercel.app//blog/编译结果</link>
    <description>本文档对以下完整编译命令中的每个参数进行逐一拆解，说明其作用、效果和生成的文件。 --- **作用**：指定要编译的 MLIR 中间表示文件。 **内容**：从 ONNX 模型转换而来的卷积层 IR，包含： - `util.func public...</description>
    <pubDate>Tue, 07 Jul 2026 00:00:00 GMT</pubDate>
    <author>address@yoursite.com (dsheng.chen)</author>
    <category>IREE</category><category>编译器</category><category>MLIR</category><category>ONNX</category><category>Pass</category><category>Dialect</category><category>编译原理</category><category>编译器后端</category><category>编译优化</category><category>LLVM</category><category>CPU</category><category>GPU</category><category>CUDA</category><category>Vulkan</category><category>性能优化</category>
  </item>

    </channel>
  </rss>
